For some definitions of serious, sure. The main critical piece that’s missing is all the testing infrastructure. Buying 100 or so ASICs for university use is one thing. Buying 100K, or more, is another.
Not the gdb support via jtag that software engineers need, they have that. But the various manufacturing test suites, which do modify gate netlists, and automated circuit characterization techniques that electrical engineers and the manufacturing engineers use.
Sure, as long as you stick to digital and purchased IP.
If you can get a "library" from somewhere (like the one Google released from Skywater), then you can use static timing analysis on the interconnect between the library blocks. Performance metrics will all be mediocre, but it will be relatively quick to design and cheap to produce if you have sufficient volumes. This is why so many of the RISC-V processor implementations suck.
If you want to design analog, RF, or high-speed, then the expensive tooling is required. You need especially need DRC and extraction (parasitics from passives, transistor numbers, etc.) for proper analysis and design.
Let’s all take a moment to remember Nikolas Wirth and Project Oberon and its fpga processor. I learned so much from reading his books. They are very accessible and I recommend them to anyone!
This course is actually mandatory in the first year of the CS undergraduate program here at ETH. I remember it very fondly for its great (and passionate) lecture and the hands on experience building a MIPS cpu in the exercise sessions. Probably the best lecture in my undergraduate.
I fully agree! Can also recommend to everyone to take a similar course or use self-study material on the topic. Understanding the lowest layers makes you a better software engineer, as your mental model of a CPU/PC gets sharper.
This is also the university that develops RumbleDB[0]. It uses JSONiq as its query language which is such a pleasure to work with. It's useful for dealing with data lakes, though I've only experimented with it because of JSONiq.
There are some parts in nand2tetris that are not self-contained, in the sense that even if you study and master all the preceding content, it is not guaranteed that you can solve the assignment. That's why I don't like it that much.
Broadening the perspective here. Has anyone curated a complete computer science / computer engineering curriculum here with classes that are essentially “best of breed” on YouTube?
Details on the ETH Zurich open source ASICs can be found here:
https://github.com/open-source-eda-birds-of-a-feather/open-s...
Presented at DAC 2025
Is it even possible to design serious ASICs without expensive tooling?
For some definitions of serious, sure. The main critical piece that’s missing is all the testing infrastructure. Buying 100 or so ASICs for university use is one thing. Buying 100K, or more, is another.
Not the gdb support via jtag that software engineers need, they have that. But the various manufacturing test suites, which do modify gate netlists, and automated circuit characterization techniques that electrical engineers and the manufacturing engineers use.
From the slides, they are reducing the gap, it's not there yet.
But I was actually pleasantly surprised by how close they are.
Sure, as long as you stick to digital and purchased IP.
If you can get a "library" from somewhere (like the one Google released from Skywater), then you can use static timing analysis on the interconnect between the library blocks. Performance metrics will all be mediocre, but it will be relatively quick to design and cheap to produce if you have sufficient volumes. This is why so many of the RISC-V processor implementations suck.
If you want to design analog, RF, or high-speed, then the expensive tooling is required. You need especially need DRC and extraction (parasitics from passives, transistor numbers, etc.) for proper analysis and design.
Let’s all take a moment to remember Nikolas Wirth and Project Oberon and its fpga processor. I learned so much from reading his books. They are very accessible and I recommend them to anyone!
This course is actually mandatory in the first year of the CS undergraduate program here at ETH. I remember it very fondly for its great (and passionate) lecture and the hands on experience building a MIPS cpu in the exercise sessions. Probably the best lecture in my undergraduate.
I fully agree! Can also recommend to everyone to take a similar course or use self-study material on the topic. Understanding the lowest layers makes you a better software engineer, as your mental model of a CPU/PC gets sharper.
This is also the university that develops RumbleDB[0]. It uses JSONiq as its query language which is such a pleasure to work with. It's useful for dealing with data lakes, though I've only experimented with it because of JSONiq.
[0] https://github.com/RumbleDB/rumble
I'm taking Ghislain Fourny's Big Data course here at ETH, he's such a good professor
Onur Mutlu also posts his (great) lectures to YouTube: https://www.youtube.com/@OnurMutluLectures
The link for this course's playlist is posted on the page.
Does anyone know how this course compares to the NAND2Tetris course?
You can check out Onur Mutlu's videos on YouTube. I'd say it is much more demanding than NAND2Tetris.
There are some parts in nand2tetris that are not self-contained, in the sense that even if you study and master all the preceding content, it is not guaranteed that you can solve the assignment. That's why I don't like it that much.
Broadening the perspective here. Has anyone curated a complete computer science / computer engineering curriculum here with classes that are essentially “best of breed” on YouTube?
Crazy how successful the ETH open source designs were. The pop up in lots of places.
https://www.topuniversities.com/world-university-rankings
ETH is at 7
Not too shabby for such a tiny country.
Not too shabby, while „citations per faculty“ is the indicator that destroys science and isn’t a very strong predictor for teaching quality.